Difference between revisions of "Reconfigurable Computing"

From Splatspace
Jump to: navigation, search
(Links)
Line 39: Line 39:
 
* [http://www.arces.unibo.it/content/view/31/243 XiRisc/PiCoGA project at University of Bologna, Italy]
 
* [http://www.arces.unibo.it/content/view/31/243 XiRisc/PiCoGA project at University of Bologna, Italy]
 
* [http://www.sciengines.com/copacobana/ COPACOBANA Project, Germany]
 
* [http://www.sciengines.com/copacobana/ COPACOBANA Project, Germany]
 +
* [http://teal.gmu.edu/lucite/ LUCITE Project @ GMU]
 +
* [http://www.ecs.umass.edu/ece/tessier/rcg/index.html Reconfigurable Computing Group @ UMass]
 +
* [http://www2.engr.arizona.edu/~rcl/ Reconfigurable Computing Lab @ Arizona]
 +
* [http://www.ece.neu.edu/groups/rcl/publications.html Reconfigurable Computing Lab @ NEU]
 +
* [http://www.ece.cmu.edu/research/piperench/ PipeRench Project]
 +
* [http://brass.cs.berkeley.edu/ BRASS Research Group - Berkeley]
 +
* [http://www.ncsa.illinois.edu/Conferences/HPRCTA10/ Fourth International Workshop on High-Performance Reconfigurable Computing Technology and Applications]
  
 
== See Also ==
 
== See Also ==

Revision as of 05:52, 3 December 2011


Contents

Introduction

From Reconfigurable Computing @ Wikipedia:

Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference with custom hardware, i.e. application-specific integrated circuits (ASICs) is the possibility to adapt the hardware during runtime by "loading" a new circuit on the reconfigurable fabric.

Links

See Also